Libera Brilliance+ with GDX Module implemented provides:

• Local and global fast acquisition data concentration
• Fast acquisition history buffer storage
• Global orbit correction algorithm
• Fast acquisition output stream
• Magnet corrector power supply output stream
• Adjustable data rate and bandwidth

These features provide a complete low-jitter, high-availability FOFB solution, implemented entirely on the FPGA. It can interface directly with the power supplies of the corrector magnets.

Data concentration can be carried out using the Libera Grouping or the user written protocol.

GDX Module features:

• Virtex 6 series of Xilinx FPGA, speed grade 2 (default), 6.5 Gbps
• DDR3 memory
• Protocol independent SFP slots (4)
• Low latency high speed LVDS links to processor modules
• FPGA development kit